In a fabrication of an integrated circuit, for example, a MOS transistor, a gate structure including a high-k dielectric layer and a metal gate (hereafter called HK/MG for short) has been widely used so as to improve the performance of the integrated circuit.
Generally, in the technology for manufacturing the HK/MG, after a poly-silicon dummy gate is removed, the metal gate of the HK/MG is formed. The high-k dielectric layer can be formed before removing the poly-silicon dummy gate (High-K first) or after removing the poly-silicon dummy gate (High-K last). However, in the typical method for manufacturing the metal gate, the high-k dielectric layer is prone to be etched by the etchants used during forming the metal gate so as to generate a loss of the high-k dielectric layer, thereby affecting the reliability of the gate structure of a n-type MOS transistor and the performance of the MOS transistor.